In the CPU instruction cycle, which stage translates the fetched instruction into signals that control the rest of the CPU?

In the CPU instruction cycle, which stage translates the fetched instruction into signals that control the rest of the CPU?

• A. Fetch
• B. Decode
• C. Execute
• D. Store

Answer: (B)

Decoding is the stage that turns the fetched instruction into the control signals that drive the rest of the processor. After an instruction is fetched, the decode logic examines the opcode and any operand fields to determine what operation is being requested and which data paths and registers are involved. It then generates the precise control signals that steer the datapath: which registers to read, which ALU operation to perform, memory read/write actions, and how to sequence the subsequent steps. For example, if the instruction requests adding two registers, the decode stage sets up the signals to read those registers, activates the addition in the ALU, and prepares where the result should be written. The Execute stage then carries out the operation, and later stages handle writing results back or accessing memory as needed.

Decoding is the stage that turns the fetched instruction into the control signals that drive the rest of the processor. After an instruction is fetched, the decode logic examines the opcode and any operand fields to determine what operation is being requested and which data paths and registers are involved. It then generates the precise control signals that steer the datapath: which registers to read, which ALU operation to perform, memory read/write actions, and how to sequence the subsequent steps. For example, if the instruction requests adding two registers, the decode stage sets up the signals to read those registers, activates the addition in the ALU, and prepares where the result should be written. The Execute stage then carries out the operation, and later stages handle writing results back or accessing memory as needed.